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Memori element with electrical erase
Electrically erasable PROMs (EEPROMs)
The term EEPROM (electrically erasable PROM) refers to a PROM which, unlike the EPROM, can also be erased electrically. With the more recent types, the voltage converter for generating the programming voltage and the timer for determining the programming pulse duration are incorporated in the same chip. In order to program a byte, merely the address and data must be applied. If programming is then initiated by a write command, the EEPROM stores the address and data internally and immediately re-enables the address and data lines. The subsequent process takes place autonomously on the chip. The old byte is first erased and the new byte is then programmed. This process is internally monitored to ensure that the programmed charge is adequate. The process lasts 1 to 10ms, i.e. the same order of magnitude as with EPROMs. Some EEPROMs are capable of storing not just one byte but an entire "page" containing 16 to 64 bytes in one programming process. To do this, the page is read into an internal RAM before issuing the programming command. This gives effective programming times of 30 us per byte.
However, despite these simple, fast erase and write procedures, one should not be tempted to use an EEPROM as a RAM. The number of possible write cycles is in fact limited: no byte must be written more than 104 to 106 times (depending on type). With a programming time of 1 ms, the end of the operating life of a byte or page may be reached in as little as 10 s if continuous programming is performed [3.11, 3.12].
For this reason EEPROMs are sometimes combined with RAMs. The contents of these types of memory are only transferred to the EEPROM if the supply voltage fails. During normal operation, the RAM provides a short write cycle which is not associated with reduction in lifetime [11.13].
Some examples of EEPROMs are listed in Fig. 3.26. With many EEPROMs, as with most memories, the power dissipation is reduced when they are not selected by CS = 1. The smallest power dissipation obviously occurs when the supply voltage is disconnected completely. This does not result in the data being lost - as in the case of all ROMs - but the access time after application of the supply voltage is increased due to the transient response of the read amplifiers. For this reason it is inadvisable to switch on the supply voltage only when the memory is accessed.
| Capacity | Organization | Type | Manufacturer | Operating power, typical | Access time, max | Pins |
| Standard EEPROMs, CMOS: (VDD = 5 V, f = fmax) | ||||||
| 16 kbit | 2k x 8 | 28C16 | At,Se,Xi | 100 mW | 200ns | |
| 16 kbit | 2k x 8 | 28HC16 | At | 300 mW | 35ns | |
| 64 kbit | 8k x 8 | 28C64 | At, Se, Xi | 120 mW | 200ns | |
| 64 kbit | 8k x 8 | 28HC64 | At | 280 mW | 45ns | |
| 256 kbit | 32k x 8 | 28C2S6 | At, Se, Xi | 150 mW | 200ns | |
| 256 kbit | 32k x 8 | 28HC256 | At | 350 mW | 70ns | |
| 1 Mbit | 128k x 8 | 28C010 | At, Se, Xi | 300 mW | 200ns | |
| 1 Mbit | 64k x 16 | 28C1024 | At | 400 mW | 150ns | |
| Flash EEPROMs, CMOS: (VDD = 5V, f = fmax) | ||||||
| 256 kbit | 32k x 8 | 28F256 | In, At, Am | 150mW | 150ns | |
| 512 kbit | 64k x 8 | 28F512 | In, Se, Am | 150mW | 150ns | |
| 1 Mbit | 128k x 8 | 28F010 | In, Se, Am | 150mW | 150ns | |
| RAMs with subordinate EEPROMs: (VDD =5V) | ||||||
| 512 bit | 128k x 4 | X22C13 | Xi | 120ns | ||
| 4 kbit | 512k x 8 | X2004 | Xi | 400 mW | 200ns | |
| 16 kbit | 2k x 8 | X20C16 | Xi | 120ns | ||
| 64 kbit | 8k x 8 | PNC11C68 | Pl | 250 mW | 35ns |
Fig. 3.26 - Examples of EEPROMs.
Manufacturer: Am = AMD, At = Atrnel, In = Intel, Pl = Plessy, Se = Seeq, Xi = Xicor
Flash EEPROMs are intermediates between EPROMs and EEPROMs. Like EEPROMs they can be erased electrically, not byte by byte, however, as can the EPROMs, but the entire chip is erased at once. This is the reason for their name. They are erased much more simply than EPROMs: a single erase pulse lasting for a few seconds is required. It is not necessary to take the package from the circuit and put it for 20 min into an eraser unit. Flash EEPROM technology is little more complicated than that of EPROMs. Correspond-tingly large integration densities consistent with low prices can therefore be achieved. In order to arrive at economical solutions, the converter for the programming voltage and the timer for the programming process normally incorporated in EEPROM devices is omitted in flash EEPROMs. Flash EEPROMs are therefore programmable in the same way as EPROMs.
A comparison of the write and read performance of the various ROM types with that of RAMs is shown in Fig.3.27. We can see that the strength of RAMs is their fast write and read processes which can be repeated any number of times. With all the ROM variants, writing is subject to more or less severe limitations, although all ROMs have the advantage of retaining their contents even in the absence of supply voltage. This characteristic can be achieved for RAMs by adding a buffer battery. As we can see from Fig. 3.8, the current drain of many CMOS-RAMs is generally lower than the self-discharge of a battery. Hence, data retention of 10 years can be ensured by using appropriate batteries.
Fig- 3.27 - Comparison of RAMs and ROMs in terms of their write and read performance.
Date: 2015-01-12; view: 1245
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