Priority Encoders

The encoders discussed previously have the limitation that only one input can have the value 1 at a given time. In a priority encoder, many inputs can have the value 1 and the output represents the highest-priority input. There is a fixed priority ordering implemented in the encoder. Usually, x₀ is of lowest priority and of highest priority. An enable input E_in and the outputs E_out and A are required to build larger priority encoders.

A high-level description is

where

and

And

A priority encoder is used to select one of a set of events that can occur simultaneously and to represent this event by an integer that identifies it.

Fig. 1.32 - Priority encoder.

A priority encoder can be implemented by two subsystems, as indicated in Figure 1.32. The first subsystem, a priority-resolution network, removes all 1's except the highest priority 1; the second subsystem is a binary encoder.

The priority resolution system has 2ⁿ inputs (x₀ to ) and 2ⁿ outputs (z₀ to ).

Its high-level description is:

This corresponds to the switching expressions

The priority resolution system can be implemented directly by AND gates of (2ⁱ –1) inputs or by an iterative network as discussed in Section 4.5. An implementation of a 4-input priority resolution network using AND gates is illustrated in Figure 1.33.

Fig. 1.33 - Parallel priority-resolution network.

Date: 2015-01-12; view: 1099