Discuss in pairs (groups) using text A constituent parts of ADC.

Transform Direct Speech into Indirect

1. Mr Brown said:" I was watching TV last night."
Mr Brown said (that) .
2. Sandy explained:" I saw the accident at the corner of High Street."
Sandy explained (that) .
3. Bob said:" We had a wonderful time at Peter’s party."
Bob said (that) .
4. The farmer said:" I didn’t see her."
The farmer said (that) .
5. Will and Tim said:" We were very happy about the present."
Will and Tim said (that) .
6. Mr Jones said: As a young boy I collected stickers."
Mr Jones said (that) .
7. Peter reported:" We played a lot of tennis last year."
Peter reported (that) .
8. Mother said:" I have a headache."
Mother said (that) .
9. The Clarks told us:" We drove right down to Athens last summer."
The Clarks told us (that) .
10. Helen said:" I’m watching the late night show."
Helen said (that) .
11. Peter said:" They were interested in other countries."
Peter said (that) .
12. Mr Cooper said:" I take my medicine regularly."
Mr Cooper said (that) .
13. Mrs Miller said:" I don’t feel better now."
Mrs Miller said (that) .
14. Sarah said:" My father takes me to school every day."
Sarah said (that) .
15. He said to the reporters:" I’m a farmer in Cornwell."
He said to the reporters (that) .

10.Each sentence has one mistake. Find them and correct them. The first sentence has been done for you:

1. The fundamental building block of analog-to-digital conversion are the comparator.

Read and translate text B

TEXT B

Types of ADCs

Flash converters are the fastest ADCs, achieving speeds near 1 GS/s and resolutions of 10 bits and below. Successive-approximation register (SAR) ADCs are the most common ADCs, having resolutions of 8 to 16 bits and speeds of 1 MS/s and below. They are generally low in cost, and they typically have very good integral linearity. To achieve higher sample rates than SAR ADCs at resolutions of 10 to 16 bits is for multistage ADCs (sometimes called subranging or multipass ADCs) use the iterative approach of SAR ADCs but reduce the number of iterations in a conversion. Instead of using just a comparator, the multistage ADC uses low-resolution flash converters (4 to 8 bits) as building blocks. Integrating converters (Fig.20.1) are used for low-speed, high-resolution applications such as voltmeters. They are conceptually simple, consisting of an integrating amplifier, a comparator, a digital counter, and a very stable capacitor for accumulating charge. The most common integrating ADC in use is the dual-slope ADC.

Figure 20.1. Integrating converter

A dual-slope integrating converter uses a comparator to determine when the capacitor has fully discharged and relies on the capacitor for linearity.

An elaboration of the dual-slope ADC is the multislope integrating ADC. It achieves even higher resolution than the dual-slope ADC by discharging the capacitor at several progressively slower rates. At each rate, the counter is able to resolve finer increments of accumulated charge. An important distinction between integrating converters and other ADCs is the way they sample the input voltage. Integrating converters do not sample the voltage itself; they average the voltage over the integration period and then they sample the average that is accumulated on the capacitor. This tends to reject noise that conventional sampling cannot, especially periodic noises. Most integrating ADCs operate with an integration period that is a multiple of one line period so that any potential interference from stray electric or magnetic fields caused by the power system is canceled. Integrating converters are gradually being replaced in the marketplace with low-speed, high-resolution sigma–delta converters, which see. Sigma–delta converters are generally more flexible than integrating ADCs, and they are easier to use because they do not require an external charging capacitor. The resolution and speed of the two types are comparable, although integrating converters still have the highest linearity.

Date: 2016-04-22; view: 1291