You can specify the height of a conductor layer in three ways:
· Height (absolute)
· Delta height (relative)
· Upto (maximum top down)
You can use more than one of these methods per conductor definition as long as the numbers are valid.
All measurements are in microns unless otherwise specified.
Syntax
conductor name {field1 value1 ... fieldN valueN}
or
conductor name {
field1 value1
...
fieldN valueN
}
You can specify the field-value pairs in any order.
This syntax contains the following parameters:
· name
Specifies the name of the conductor layer.
· min_spacing value
Specifies the minimum spacing permitted by the technology between two conductors (wires) on a layer.
· min_width value
Specifies the minimum width of a conductor.
· height value
Specifies the layer's height above the substrate.
· delta_height value
Specifies the layer's height relative to the top of another layer. This parameter must be used with delta_layer.
· delta_layer layer_name
Specifies the reference layer for delta_height. It must be a layer that has already been defined. The reference layer must be a conducting layer, a dielectric layer, or a passivation layer. This parameter must be used with delta_height.
· thickness value
Specifies the layer's thickness.
· upto value
Specifies the layer's top surface height above the substrate. This value is equal to the height plus the thickness. You only need to specify two of the three or four parameters (height, {delta_height, delta_layer}, thickness, upto) to complete the geometrical definition of a conductor layer.
· resistivity value|[valuewidth]+
Specifies the layer's sheet resistivity, in ohms per square. You can enter the resistivity value as a constant, or you can enter value-width pairs as a piecewise linear function. You may want to use the value-width pairs to account for width-dependent resistivity.
If you enter value-width pairs, the syntax is as follows:
If the width of the wire is less than the minimum width, width1, use the minimum value, value1. If the width of the wire is greater than the maximum width, widthn, use the maximum value, valuen. For widths between value-width pairs, Fire & Ice QX, IceCaps, and RCgen determine the resistivity value through linear interpolation.
· gate_forming_layer [true|false]
Specifies that this layer forms the gate. The polycide or polysilicon layer is a typical gate-forming conducting layer.
· field_poly_diffusion_spacing value
Specifies the lateral spacing between field polycide and diffusion for transistor-level parasitic extraction. There is no lateral separation between gate polycide and diffusion.
· PnR_widths [value]+, PnR_spacings [value]+
Allows you to provide design widths and spacings used in the layout to the technology file generation program. These are not necessary for accurate extraction of parasitics if the design widths and spacings are within small perturbations of the minimum process widths and spacings. However, if the design widths and spacings are routinely different from the specified process parameters, it is recommended that you provide these values to the technology file generator.
· capacitor_only_layer_to layer_name
Specifies that the current layer be used solely to create high capacitance values in the design and that it is located a few angstroms above or below the layer_name layer. Layers having the capacitor_only_layer_to keyword set are not extracted.
· wire_top_enlargement Etop
Specifies the enlargement, either positive or negative, of the top edge of the wire. See Figure A-2.
· wire_bottom_enlargement Ebottom
Specifies the enlargement, either positive or negative, of the bottom edge of the wire. See Figure A-2.