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Other Die Attach Materials

Non-conducting epoxy adhesives and insulating polyimides may be filled with met­als, solders, or solders filled with glasses. Epoxies filled with 70-80% (vol) silver with improved thermal and electrical conductivities are commonly used in industry. Non-conductive adhesives may also be used for their electrically insulating proper­ties, especially for bonds between the die and substrate and other chip to package connections. In addition to conductive fillers, other agents such as wetting agents are used to improve manufacturability. Dispensing is conducted at room tempera­ture with some typical adhesives being acrylic thermoplastic resins, epoxy thermoset resins, and silicone resins. In the adhesive bonding process, the substrate or package is secured to an unheated work stage. The wet adhesive material is contained in a reservoir and a small amount is metered out onto the substrate, usually in a pattern conforming to the shape and size of the die. The die is picked up and placed onto the adhesive, making the wet bond, bonding is complete once the adhesive dries. This approach has many advantages: ease of automation, low-curing temperatures, low cost, wide range of die sizes, and option to rework. The downside includes out-gassing, contamination/bleed, inferior thermal conductivity, and sensitivity to harsh environments.

Polymer Adhesive Bonding. Polymer or adhesive bonding involves curing tem­peratures of up to 300°C with low forces applied to the substrates in low vac­uum conditions. Intermediate layers, with thicknesses ranging from a few sub microns up to tens of microns, may consist of photo-patternable polymers such as Benzocyclobutene (BCB) or resists like SU-8. Low-£ dielectric polymers, like BCB, are gaining more attention as an adhesive as these allow the creation of electrical interconnects between different functional modules (system-on-package). Although adhesive bonding compensates for surface roughness and topographical anomalies, material vapor pressures make it unsuitable for high vacuum encapsulation (below 10-2 torr) within MEMS devices. Low alignment accuracy during bonding poses another disadvantage to this method. Despite such complications, adhesive bonding is used in many applications that involve low-temperature wafers.

Anodic Bonding. Anodic bonding uses heat and an electric field to join a sili­con wafer together with an alkali-doped glass wafer. At elevated temperatures, the alkali oxides in the glass dissociate. The so-formed mobile ions (e.g., sodium) are driven by the electric field toward the cathode, creating an oxygen-rich layer at the Si-glass interface. The oxygen ions are driven to the Si surface by the electric field, resulting in oxidation of silicon. The bond strength is high and the process is irreversible. Typical process parameters for Pyrex (borosilicate glass with a sodium oxide content of ~3.5% and a closely matching CTE over a wide temperature range) involve temperatures between 350° to 500°C, high vacuum conditions, and voltages up to 1000 V. The packages resulting from this process typically are used for her­metic sealing of MEMS and MOEMS, where elevated bonding temperatures, high voltages and sodium contamination do not affect on-chip electronics.



Glass-frit Bonding. A paste made from glass powder, solvent, and a tempo­rary bonder (that fires away) is deposited on a wafer surface by screen printing. In general, the glass frit is applied to the wafer cap and is softened by heating to tem­peratures above the glass softening point. The glass material is then glazed between 300°C and 500°C. Subsequent cooling under high pressure solidifies the glass frit. Glass frit bonding is used for the caps in Sections 12.11.1 and 12.11.2.

Hermeticity is an important parameter for many MEMS devices. To achieve high vacuum encapsulation, bonding methods with low out-gassing materials, precise wafer gap control, and compatible bonding temperatures should be considered. Table 12.9 provides an overview of bonding technologies [24].

12.4.4 Flip-Chip Bonding

Controlled Collapse Chip Connection (C4) was developed by IBM in the 1960s as an alternative to manual wire bonding. Often termed "flip-chip," electrical and

Bonding technology Suitability for high vacuum (<102 torr) Precise gaps Processing Temp. (°C) Limitations
Silicon fusion bonding   V >1000 • Good surfaces needed (micro roughness, TTV, cleanliness)
Plasma activated bonding   V 200-400 • Good surfaces needed (micro roughness, TTV, cleanliness)
Anodic bonding   V 200-400 • Limited material choice (Glass - Si) • Sodium contamination
Eutectic bonding        
Au-Si V    
Au-Sn V VV  
Thermo compression bonding with intermediate layers  
Epoxy X X 150-250 • Out gassing ofbond material
Polymers X X 150-250 • Out gassing ofbond material
Glass Frit X X 350-500 • Out gassing ofbond material
Au-Au Comp V V 400-450  

 

mechanical interconnects are created by plating solder bumps between bond and metal pads of the package substrate. Chip-to-substrate misalignments are corrected by the surface tension of the molten solder, making the flip-chip process self-aligning. Unlike wire bonding which requires placement of bond pads around the periphery of the die, the flip-chip process allows the placement of bond pads any­where on the entire chip, therefore increasing the interconnect density. Having the ability to unite distinct chips into a single package, flip-chip technology has become especially attractive in the MEMS industry [25]. Furthermore, the method also pro­vides the option of rework. Prior to underfill chips may be removed and replaced when needed with minimal risk. For improved reliability, a chip underfill may be injected between the joined chip and the package substrate, although care should be taken so that the underside is covered entirely by the underfill without air pockets and voids. Complete edge fillets must be formed around all four sides of the chip to avoid high-stress concentrations [23].


Date: 2015-02-28; view: 562


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