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Successful Reply Format
| Bytes 0 - 1 | Number of bytes already transmitted |
| Bytes 2 - N | Result telemetry data |
For a success, the ACK bit will be set to 1. The number of reply messages generated depends on the amount of data requested. The final message will have the PF bit set to 1. All other reply messages will have the PF bit set to 0.
Failure Reply Format
| Bytes 0 | Sequence state |
| Bytes 1 - N | Error message |
If the functional processor stops before generating the full set of data required by the COMBINATION command, a failure reply will be generated. The ACK bit will be set to 0, to distinguish this from a successful reply.
The first byte of the return is the sequence state, as described in Table 32. The subsequent bytes contain the error message. This may be the ASIC ID message, or the result of the most recent warning or terminate message. If the error message would not fit into a single NSP packet it is truncated. Only one failure reply message will be generated, and the PF bit is set to 1.
TIME (0x13)
The TIME command returns the supervisors realtime clock, latched at the moment the final FEND character of the command is received. The data is returned as a 48-bit unsigned integer count of microseconds. The least significant bit of the count will always be zero, so the effective precision is 2 microseconds. The 48-bit count will roll over to zero after 17 years, in the unlikely event that a star tracker goes that long without resetting.
By sending several TIME commands, separated by minutes or hours, an accurate comparison can be made between the star tracker clock and the spacecraft computer clock. Rev 4 star tracker clocks are not particularly accurate, and may benefit from calibration.
Command Format
| Bytes 0 N | Zero or more bytes, ignored by the NSP module |
Reply Format
| Bytes 0 5 | 48-bit unsigned integer, counting microseconds since supervisor application start. |
Protocol Layer 6 (Presentation Layer)
Supervisor Mapping
Memory Map
Table 30: Supervisor Memory Map
| Address Range | Function |
| 0x00000000 0x000015FF | Bootloader program memory |
| 0x00001600 0x00002FFF | Supervisor program memory (flash) |
| 0x00003000 0x00003047 | Default control structure (flash) |
| 0x00003048 0x00007DFF | Supervisor program memory (flash) |
| 0x00007E00 0x00007FFF | Stored parameters (flash) |
| 0x00008000 0x0000FFFF | Unused (flash) |
| 0x00010000 0x0001F9FF | Functional processor bootloader image (flash) |
| 0x0001FA00 0x0001FBFF | Bootloader program memory |
| 0x01000000 0x010000FF | 256 B IRAM (RAM) |
| 0x02000000 0x02001FFF | 8 kB XRAM (RAM) |
| 0x03000080 0x030000FF | 128 B SFR (RAM) Bank 00h |
| 0x030C0080 0x030C00FF | 128 B SFR (RAM) Bank 0Ch |
| 0x030F0080 0x030F00FF | 128 B SFR (RAM) Bank 0Fh |
| 0x03100080 0x031000FF | 128 B SFR (RAM) Bank 10h |
The supervisor memory can be directly accessed with PEEK and POKE commands, and CRCs calculated with CRC commands. It is represented as a single 32-bit memory space, sparsely populated.
The first 5.5 kB of program memory contain the bootloader. These are protected against POKEs so that the bootloader cannot be accidentally changed. The next 58.5 kB contains the supervisor application program. A sequence of POKE commands in bootloader mode can be used to load new application programs.
The bootloader memory cannot be read by the application program, and so PEEK or CRC commands to those regions will fail if not in bootloader mode.
Starting at address 0x00010000 is a 56 kB bootloader image for the functional processor. The first four bytes indicate the length of the program, and the first actual program byte lives at address 0x00001004. When a GO command is received to boot the functional processor from supervisor flash, the byte from 0x00001004 on the supervisor is loaded into byte 0x40200000 of the functional processor. Successive bytes from the supervisor are loaded into successive locations in the functional processor. When all of the bytes (indicated by the length field at the start) have been loaded the functional processor begins execution at address 0x40200000.
The supervisor processor has two RAM areas. There is little need for a user to touch these.
There are four banks of Special Function Registers (SFRs). These should not be POKEd without knowing exactly what is going on. Even PEEKing some of these registers can have unexpected side effects.
Diagnostics
Table 31: Diagnostic Channels
| Diagnostic Channel | Function |
| 0x00 | Reset Reason |
| 0x01 | Reset Count |
| 0x02 | Internal Framing Error Count |
| 0x03 | Internal Runt Packet Count |
| 0x04 | Internal Oversize Packet Count |
| 0x05 | Internal Bad CRC Count |
| 0x06 | Internal FIFO Overflow Count |
| 0x07 | External Framing Error Count |
| 0x08 | External Runt Packet Count |
| 0x09 | External Oversize Packet Count |
| 0x0A | External Bad CRC Count |
| 0x0B | External FIFO Overflow Count |
Each diagnostic channel is presented as a 32-bit unsigned integer. The internal storage for many of these is only 16 bits, so overflows may occur after 64k counts.
Internal errors represent bad NSP events on the communications link between the supervisor and functional processors. External errors represent bad NSP events on the communiations link between the supervisor and the host spacecraft. Reset will clear all of the error counters.
Reset Reason
The reset reason is an enumerated type, describing the reason for the most recent reset of the supervisor processor.
Table 32: Reset Reason Codes
| Reset Reason Code | Meaning |
| Power cycle. The star tracker has either been freshly turned on, or the input voltage has drooped below approximately 2 V. | |
| Flash error. An illegal attempt has been made to read or write flash memory. | |
| Overcurrent. The star tracker input current has momentarily exceeded the 750 mA maximum threshold, and the supervisor processor has been reset in an attempt to clear the fault. | |
| Watchdog reset. The default application program does not use the watchdog timer, but if it somehow does get turned on this is the reset that it would generate. | |
| Missing clock. The internal oscillator has failed momentarily. Obviously if you are reading this code then the oscillator must have restarted. | |
| Pin reset. The external /Reset signal has been pulled low. | |
| Software reset. The most likely cause is that an INIT command has been received with no data, forcing a reset. This could also be caused if the supervisor software encounters an irrecoverable fault, such as a spurious interrupt. |
Reset Count
The reset count contains the number of supervisor processor resets since the last power cycle reset. Immediately after a power cycle the reset count will read as 0. After the first non-power-cycle reset it will read 1.
Date: 2015-12-17; view: 727
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