Morphware

Flexibility or performance?

That choice is a constant trade-off for microprocessor designers. General-purpose processors in personal computers execute a broad set of software commands that can cope with any task from graphics to complex calculations. But their flexibility comes at the expense of speed. In contrast, application-specific integrated circuits (ASICs), optimized for a given task, such as the computing required in graphics or sound cards, are very fast but lack adaptability.

Some processors fit a niche between these two types of hardware. Called morphware, they can be reconfigured and optimized for any task. One example—the commercially available field-programmable gate array (FPGA)—consists of large blocks of transistors that perform logic operations and that can be “rewired” by the software. Customization enables FPGAs to accelerate data encryption, automatic military target recognition or data compression by a factor of 10 to 100— enabling, for instance, dramatically enhanced security or faster target acquisition times as compared with a general-purpose CPU (central processing unit).

FPGAs rely on the ubiquitous transistor-based technology called complementary metal oxide semiconductor (CMOS). They have limitations, however. Changing operations on the fly—converting, say, a calculation of a matrix of numbers to a parallel-processing computation—requires the relatively slow rewiring of connections between large blocks of transistors, not the individual elements (gates) that perform a processor’s logic operations. FPGAs generally take up a large amount of space, resulting in a very low density of circuitry and limiting the number and speed of processing operations.

In the past few years, a number of groups have begun to explore a new type of morphware processor that uses layers of magnetic materials to create reconfigurable logic elements. The advantages of these magnetologic elements are that the information stored does not disappear when external power is shut off and that they do not have to be refreshed while the device is in operation. Unlike CMOS-based systems, the logic is nonvolatile. This stability of magnetic bits explains the key role of magnetic materials in data storage, such as hard disks. In a magnetologic device, nonvolatility of information would also reduce power consumption, and a single elementwould be capable of performing different logic functions that typically require multiple transistors.

From Cell Phone to MP3 Player

MAGNETOLOGIC COULD BRING electronic multitasking to a new level, letting a designer create a cell phone that could later morph into a music player, thereby reducing the need for separate microprocessors in electronic equipment. Because the switching speed of magnetologic gates is fast, switching at billions of cycles per second (gigahertz), this chameleon of processors can alter its functionality many times within the space of even one second.

The operation of magnetologic builds on a technology for storing digital bits known as magnetic random-access memory (MRAM), which is now nearing commercialization. Each unit of MRAM consists of two ferromagnetic metallic alloys separated by a nonmagnetic spacer that ensures that the magnetization of one layer does not affect the other and that the polarity (direction of magnetization) can be shifted independently [see box above]. The memory element represents the value of a digital bit, which depends on whether the magnetization of the upper and lower layers are aligned in parallel or oppose each other. Lower resistance to the flow of electric current occurs when the magnetization of both layers is in parallel—a state that represents, say, a digital “1,” When the polarity of both layers is opposite, the so-called magnetoresistance increases (a “0” state).

To switch the resistance of the MRAM element from low (1) to high (0), or vice versa, an electric current must flow through inputs connected to the memory element. Besides the simple 0 or 1 that it stores in memory, a single MRAM element can be used to represent basic logic functions, such as AND or OR.

Elementary magnetologic gates date back to the early 1960s but were quickly supplanted by silicon microchips. In 2000 William C. Black, Jr., and Bodhisattva Das of Iowa State University published a seminal report on magnetologic based on magnetoresistance. Two years later Siemens Research in Erlangen, Germany, demonstrated experimentally a reconfigurable magnetologic element. Then, in 2003, our group at the Paul Drude Institute in Berlin published a paper that proposed using a simpler implementation for changing the logic states of the various computational elements.

Making a Logic Gate

A MAGNETOLOGIC GATE is very similar to an MRAM cell. It also consists of two magnetic layers separated by a nonmagnetic spacer in which the parallel and antiparallel magnetizations exhibit low and high resistance and provide the logic outputs “1” and “0,” respectively. In general, the magnetoresistance of layered systems is significantly higher than that of systems not built in layers, easing the reading and writing of bits. This property is known as giant magnetoresistance or tunneling magnetoresistance, depending on which type of spacer material is used. Both effects depend on the electrons’ spins (their angular momenta), which are all aligned in the same direction, almost as if the electrons were tiny balls spinning on their axes. These effects are used to “read” the value of a bit.

Changing the orientation of spin is used to “write” a bit—in other words, to change the magnetization from one direction to another. The direction of magnetization of either layer can be reversed by the magnetic field of a current flowing through the input lines. But a number of investigators are examining another method, in which spin exerts a torque that can switch a layer’s magnetization from one direction to another [see “Spintronics,” by David D. Awschalom, Michael E. Flatte and Nitin Samarth; SCIENTIFIC AMERICAN, June 2002].

In the design we put forward at Paul Drude, the magneto-logic gate contains three inputs—A, B and C—each of which is addressed by a current of equal magnitude. Our concept makes use of the fact that a magnetoresistive element, though providing only two output values (a 0 and a 1), can be in four different initial states, two of them parallel and two of them antiparallel, allowing the configuration of distinct logic states. Previous magnetologic designs required more complex circuitry that would employ, for example, input currents of different intensity.

In our design, a logic operation begins by setting the gate polarity in one of these four states by addressing two or three of the input lines. Then, in a second step, the logic operation is performed by activating only the upper two input lines, A and B. A chosen initial state can only be reversed when two or three of the input lines are addressed with the same polarity magnetic field, changing the output value from 1 to 0, or the converse [see box below]. This process has the advantage that the logic state can be reprogrammed with each new operation.

Because the magnetologic gate maintains its assigned polarity in the absence of an external current, a bit is stored without continuous refreshing and can be read out without deleting the information. Thus, the combined logic and storage capability saves not only energy but also time, compared with information processed by conventional CMOS circuitry.

For the AND function, for example, we start from an anti-parallel state with an output of 0. Viewed in cross section, the polarity of the top layer points to the left, whereas the bottom layer points right. Only positive currents that are applied to both inputs A and B—currents that generate a positive magnetic field—can switch the direction of magnetization of the top layer from left to right. The OR gate operates using an analogous method, but the magnetizations of both layers point to the right at the beginning of the procedure. The other two basic logic functions are obtained by switching the bottom layer. All three inputs—A, B and C—are applied to switch the lower layer. The magnetic field needed to switch the polarity of the top layer is less than that for the bottom layer, so the two can be addressed independently. Switching the bottom layer transmutes the output of an AND and OR function into its opposite: NOT AND (NAND) or NOT OR (NOR) [see box above].

The OR and AND functions correspond to Boolean addition and multiplication, respectively. Together with NAND and NOR, they represent a powerful basis for describing even the most complex circuits. By changing the procedure of addressing the inputs, magnetoresistive logic gates can produce even more advanced logic functions. For instance, the XOR gate—key to a critical logic unit called a full adder—differentiates between the same and opposite inputs, yielding an output 1 for any two of the same inputs (0/0 or 1/1) and 0 for opposite inputs (0/1 or 1/0). Two magnetoresistive elements can create the XOR gate as compared with eight to 14 transistors in CMOS technology.

The magnetologic gates can also be employed to construct an entire full adder—the most widely used logic unit in a processor. A full adder sums binary inputs A and B plus a carry digit brought forward from a previous calculation. The addition of the three digits produces a new sum as well as a new carry digit. The nonvolatility and the programmability of the magnetologic gates mean that a full adder can be fashioned with only three gates, rather than the 16 transistors with CMOS. The magnetic full adder might become competitive in speed even with the fastest CMOS full adders and boasts superior power efficiency.

Looking Ahead

THE FATE OF MORPHWARE could closely resemble that of commercially announced MRAM cells. The input lines A and B would be arranged in the form of a rectangular grid, a so-called crossbar geometry, similar to that in an MRAM. The magnetoresistive gate elements would sit in the crossing points and be switched only when both input lines are addressed simultaneously. The gates would have to be stacked on top of a template of CMOS transistors that would relay signals indicating when each gate element should begin and stop processing. The transistors in this configuration would also be used to amplify the small currents needed to read a magnetoresistive bit [see box on page 51].

The chameleonlike nature of a morphware processor retains many advantages. Because of the programmability of the logic gates, hardware no longer determines processor capabilities. In CMOS, the logic of a conventional transistor gate is defined by the wiring and is therefore fixed. A magnetic processor constitutes an array of logic gates, each of them programmable individually by the software.

A magnetic chameleon processor therefore needs far fewer logic gates than a conventional processor, in which only a few percent of the hardwired gates are useful for any given task. The programmability also means that newer and better software can easily be implemented, even on older magneto-logic processors. Because the switching speed of magneto-logic gates is fast, billions of cycles per second, a chameleon processor can alter its functions many times within the confine

the output of its last operation—also gives the device a benefit in speed. Although magnetologic is fast, its gigahertz switching time is comparable to that of CMOS processors. But nonvolatility means that a clock is not needed to synchronize the extraction of digital bit values from the storage cells in a computer’s memory, which simplifies and speeds processing. The bits themselves are stored where they are processed. Unlike CMOS, magnetologic does not necessarily have to reduce component size to increase performance—in other words, it bypasses miniaturization. This advantage may appear increasingly attractive as chip manufacturers struggle to make components ever smaller.

Design of a future chameleon processor is still an academic proposition—for now, no one is considering its development outside of the few laboratories that have published papers. Because of its close similarity to MRAM, magnetologic may benefit from engineering work that is addressing problems such as the coupling of magnetic fields between layers in the memories. Similarly, it could suffer if the industry slows development of the technology. Already some companies have hesitated to move ahead with MRAM, estimating that yet another version of random-access memory is unlikely to pull in large revenues. In magnetologic’s early implementation, MRAM itself might function as an elementary processor that could be used in early products. But because only one magnetic layer is switched in MRAM, only two programmable functions could be accessed, either AND/OR or NAND/NOR.

To achieve the full potential of a magnetic chameleon processor, many challenging, but ultimately solvable, problems must be surmounted: First, both magnetic layers need to be switched independently, which is still difficult to do in a real working gate. Also, because the processor is working to full capacity most of the time, it generates pockets of heat locally that could compromise the integrity of the data. So reliability requirements for reading and writing operations are much higher. Engineers must show that magnetologic gates can achieve a lifetime as high as 1016 to 1017 operations, requiring longevity improvements of two or three orders of magnitude.

In the meantime, one mitigating factor is that defective gates can be detected and bypassed when a computer boots up. To optimize magnetologic, new magnetic compounds are needed that are compatible with semiconductors and exhibit a giant magnetoresistance [see “Magnetic Field Nanosensors,” by Stuart A. Solin; SCIENTIFIC AMERICAN, July 2004].

Perhaps one of the most imposing hurdles is to develop a compiler language and new algorithms that take full advantage of the real-time reprogrammability of the logic gates. To bring a magnetic chameleon processor to market will require an interdisciplinary research effort that uses the combined skills of specialists in materials science and technology, hardware design and electronics, computer sciences, and mathematics.

Date: 2015-01-29; view: 934